The goal is to investigate the architectural trends and the fundamental problems in the design of compact and slack computer clusters. The problems of designing high-speed system area networks (SAN) are of special concern. The impact of various parallel computational models over the parallel system performance will be investigated. The effect of the utilization of hardware accelerators for wide spectrum of scientific and engineering application will be considered. The major factors influencing the performance and communication parameters of the computer clusters will be considered. Experimental study involves the design of systolic FPGA accelerators. |
