Abstract: |
Modern electronic circuits are becoming more and
more complex. Their testing and verification by convenient means is
expensive, so new testing methods and algorithms are required.
Traditionally most test design efforts are done at gate level. By moving
these efforts to models of higher level of abstraction, testing is made simpler
and the total chip design time is reduced. Tests, designed at higher level of
abstraction can be used to detect design errors too. Test design at higher
level of abstraction is also justified by fact that circuit simulation at high
level of abstraction requires less time and hardware resources. It is much
cheaper to fix errors if they are noticed early in the design flow, so having a
good test early in the design flow is a big advantage . Generally, tests made
at high level of abstraction are longer if compared to tests made at gate
level, but they can be used for different structural representations of the
same design. The size of initial long tests can be reduced to adapt to
particular circuit implementation. Test design is done in parallel with circuit
design. Therefore it is expected that by designing tests early in the design
flow, the total time to market may be reduced. Combinational circuit testing
is well understood and supported by many commercial tools, but sequential
circuit testing is still a problematic task. Electronics design is becoming
similar to software design, but quality and reliability requirements for
hardware usually are higher than for software. If software bugs can be fixed
after a project is finished, hardware defects can't be fixed this way. If
insufficient testing is done for hardware project, company risks to have big
financial losses.
Work purpose. To explore the methods of test design at high level of
abstraction. To create methods for sequential circuits test design when the
circuit's behavior is known, but the structure is unknown. To evaluate
quality of such tests. |
